# EDA Design & Simulation Sample Portfolio Validation README

This evidence package is a portfolio sample created to demonstrate electronics design reasoning, SPICE-readable simulation assets, KiCad schematic handoff structure, and AI EDA evaluation workflow design. It is not presented as a manufactured board, prior employer deliverable, or client project.

## Tool Evidence

- KiCad CLI output is captured in `../kicad/version-kicad.txt`.
- Ngspice output is captured in `../ngspice/version-ngspice.txt`.
- The KiCad schematic handoff is stored in `../kicad/esp32-haptic-controller/`.
- The KiCad project includes project-local library tables and a symbol-based schematic.
- The schematic exports successfully to `../kicad/esp32-haptic-controller/schematic-export.pdf`.
- KiCad ERC output is captured in `../kicad/esp32-haptic-controller/erc-report.txt` with 0 errors and 0 warnings.
- Ngspice batch simulations ran for all five SPICE-readable netlists.
- From the site root, the full simulation evidence pack can be regenerated with `eda-portfolio/evidence/ngspice/run-all.sh`.

## Flagship Circuit Boundary

The ESP32 wearable haptic controller sample focuses on one inspectable circuit boundary:

- ESP32-style GPIO PWM output.
- 220 ohm gate resistor.
- 100k gate pulldown resistor.
- Logic-level N-channel MOSFET low-side switch.
- Vibration motor modeled as an R-L load.
- Flyback diode from drain/motor low side to the battery rail.
- Local supply decoupling near the motor connector.
- Motor/supply connector and board-review notes.

Battery charging, fuel gauging, sensors, and enclosure integration are intentionally out of scope for this first evidence package.

## Flagship BOM

The representative BOM is documented in `esp32-haptic-controller-bom.md`.

## MOSFET Driver Simulation

Source: `../ngspice/mosfet-driver.cir`

Generated output:

- `../ngspice/mosfet-driver-output.csv`
- `../ngspice/mosfet-driver-waveform.png`
- `../ngspice/mosfet-driver-run.log`

Expected behavior:

- The gate follows the 3.3 V PWM source through the 220 ohm resistor.
- The 100k pulldown keeps the MOSFET off when the GPIO is low or high impedance.
- While the MOSFET is on, the motor current path is VBAT -> R-L motor -> MOSFET -> ground.
- When the MOSFET turns off, the flyback diode gives the motor inductance a clamp path back to the VBAT rail.
- The drain node should not show an uncontrolled inductive spike in the plotted transient response.

Observed behavior:

- Ngspice ran in batch mode without fatal errors.
- The generated CSV contains time, GPIO voltage, gate voltage, drain voltage, motor/inductor current, and VBAT source current.
- The waveform PNG shows gate/PWM drive behavior and the drain clamp behavior during switching.
- Observed drain range in the generated output is approximately -0.0005 V to 4.23 V, consistent with the clamp path and diode model rather than an uncontrolled high-voltage spike.

## Additional SPICE Samples

`../ngspice/rc-low-pass.cir`

- First-order RC low-pass filter.
- Expected cutoff is approximately 1.59 kHz for 10k and 10 nF.
- Used to check whether an evaluator can calculate and compare cutoff-frequency behavior.
- Observed response is about -2.99 dB at 1.58 kHz in the generated AC output.

`../ngspice/opamp-gain-stage.cir`

- Idealized non-inverting op-amp gain stage.
- Expected small-signal gain is 3 V/V from `1 + 20k/10k`.
- Used to check gain reasoning and saturation awareness.
- Observed transient output peak is approximately 0.600 V for a 0.200 V input peak.

`../ngspice/buck-converter.cir`

- Behavior-level asynchronous buck converter transient sample.
- Ideal duty-cycle estimate is 2.0 V for 5 V input and 40% duty, while diode/parasitic losses reduce the observed output.
- Observed final-window output average is approximately 1.69 V with about 7 mV ripple in the generated data.

`../ngspice/adc-divider.cir`

- Corrected 5 V sensor to 3.3 V ADC divider sample.
- Uses a 22k / 33k divider so the ideal ADC node is near 3.0 V.
- Observed ADC peak is approximately 3.00 V in the generated transient output.

## Human Validation Notes

Any AI-generated EDA asset shown in this portfolio must be labeled as AI-generated and must include a human validation note before being presented as corrected or acceptable.

The corrected examples in the AI EDA rubric are human-authored review samples. They are intended to show how an evaluator should score generated circuit artifacts, not to claim the samples were manufactured or deployed.